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INTEL E10G42BTDA X520-DA2 LP FH Dual

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INTEL E10G42BTDA X520-DA2 LP FH Dual (E10G42BTDA)

INTEL E10G42BTDA X520-DA2 LP FH Dual

Artikelnr.:
E10G42BTDA
EAN:
5032037041461
  • Portar/kontakter iSCSI
  • Externa portar Ja
  • Gränssnitt PCI-E
  • Interna portar Ja
  • RAID Nej
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Intel® Ethernet Server Adapter X520-DA2


E10G42BTDA

Dual-port Direct Attached

Intel® Ethernet X520 Server Adapters


Ultimate flexibility and scalability in virtual and unified storage environments

Intel’s new family of Intel® Ethernet X520 Server Adapters are the most flexible and scalable Ethernet adapters for today’s demanding data center environments.

The Intel® Ethernet X520 Server Adapter family addresses the demanding needs of the next-generation data center by providing unmatched features for virtualization, flexibility for LAN and SAN networking, and proven, reliable performance.

Features

Intel® 82599 10 Gigabit Ethernet Controller Industry-leading, energy-efficient design for next-generation 10 Gigabit performance and multi-core processors
Low-profile Enables higher bandwidth and throughput from standard and low-profile PCIe slots and servers
Load balancing on multiple CPUs Increases performance on multi-processor systems by efficiently balancing network loads across
CPU cores when used with Receive-Side Scaling (RSS) from Microsoft or Scalable I/O on Linux*
iSCSI remote boot support Provides centralized storage area network (SAN) management at a lower cost than other iSCSI solutions
Support for most network operating systems (NOS) Enables widespread deployment
RoHS-compliant2 Complies with the European Union directive 2002/95/EC to reduce the use of hazardous materials
Intel® PROSet utility for Microsoft Windows* Device Manager Provides point-and-click management of individual adapters, advanced adapter features, connection
teaming, and virtual local area network (VLAN) configuration
Time Sync (IEEE 1588, 802.1as) Lets networked Ethernet equipment synchronize internal clocks according to a network master clock;
endpoint can then acquire an accurate estimate of the master time by compensating for link latency

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